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CM6805A
10-PIN Green-Mode PFC/PWM Combo CONTROLLER
GENERAL DESCRIPTION
The CM6805A is the Green-Mode PFC/PWM Combo controller for Desktop PC and High Density AC Adapter. For the power supply, it's input current shaping PFC performance could be very close to the performance of the CM6800 or ML4800 leading edge modulation average current topology. CM6805A offers the use of smaller, lower cost bulk capacitors, reduces power line loading and stress on the switching FETs, and results in a power supply fully compliant to IEC1000-3-2 specifications. The CM6805A includes circuits for the implementation of a leading edge modulation, input current shaping technique "boost" type PFC and a trailing edge modulation current, PWM. The CM6805A's PFC and PWM operate at the same frequency, 67.5kHz. A PFC OVP comparator shuts down the PFC section in the event of a sudden decrease in load. The PFC section also includes peak current limiting for enhanced system reliability. PFC has a PFCOFFB pin which can use for AC brown out application and determine the GMth to turn off PFC.
FEATURES
10-Pin SOIC package. Use RAC around 4~8 Mega Ohm at IAC pin. Easy to configure into Boost Follower. Enable lowest BOM for power supply with PFC. Internally synchronized PFC and PWM in one IC. Patented slew rate enhanced voltage error amplifier with advanced input current shaping technique. Universal Line Input Voltage CCM boost or DCM boost with leading edge modulation Technique. Feed forward IAC pin to do the automatic slope compensation. PFCOVP, Precision -1V PFC ILIMIT, PFC Tri-Fault Detect comparator to meet UL1950 Low supply currents; leading start-up: PFC and 100uA trailing typical, edge operating current: 2mA typical. Synchronized modulation PWM to reduce ripple current in the storage capacitor between the PFC and PWM sections and to reduce switching noise in the system VIN-OK Comparator to guarantee to enable PWM when PFC reach steady state High efficiency trailing-edge current mode PWM Exact 50% PWM maximum duty cycle UVLO, REFOK, and brownout protection Digital PFC and PWM soft start, ~10mS Precision PWM 1.5V current limit for current mode operation PFCOFFB pin to sense light load to turn off PFC or PFCOFFB pin to sense Input voltage as AC Brown Out PFC using Input Current Shaping
2007/11/28 Rev 1.3
Champion Microelectronic Corporation
Page 1
CM6805A
10-PIN Green-Mode PFC/PWM Combo CONTROLLER
APPLICATIONS
Desktop PC AC Adaptor Open Frame
PIN CONFIGURATION
10 Pin SSOP (R10) Top View
PIN DESCRIPTION
Pin No. 1 2 GND IAC Symbol Ground Feedforward input to do slope compensation and to start up the system. During the start up, IAC is connected to VCC until VCC is greater than 13V. Current sense input to the PFC current limit comparator PFC transconductance voltage error amplifier output PFC transconductance voltage error amplifier input PWM feed back and current limit comparator input PFCOFFB; it can turn off PFC stage when it is below 5V. Positive supply PFC driver output PWM driver output 0 1 mA Description Min. Operating Voltage Typ. Max. Unit
3 4 5 6 7 8 9 10
ISENSE VEAO VFB V+I PFCOFFB VCC PFC OUT PWM OUT
-5 0 0 0 0 10 0 0 15 2.5
0.7 6 3 1.5 VCC 18 VCC VCC
V V V V V V V V
ORDERING INFORMATION
Part Number Operation Frequency Initial Accuracy (KHz) Min CM6805AGIR Fpwm = Fpfc = 67.5Khz 60 Typ 67.5 Max 74 -40 to 125 10 Pin SSOP(R10) Temperature Range Package
Note: 1.G : Suffix for Pb Free Product 2.Initial Accuracy : TA=25
2007/11/28 Rev 1.3
Champion Microelectronic Corporation
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CM6805A
10-PIN Green-Mode PFC/PWM Combo CONTROLLER
BLOCK DIAGRAM
2 IAC
40K IAC
4 .VEAO 8 VCC
400K
S R R .
Q
ISENSE 3
100K +
PFC CMP
Q
UVB
VREFDK
SUM VFB 5
. 2.5V + . .
+
9 PFCOUT
V To Ramp GMV UVLO FAULT
VCC . .
BROKENWIRE
. 0.5V + PFCCLK .
PFC CLK
.
fpfc=67.5KHz
PFC OVP
+ 2.75V 2.5V . VFB 2.25V 1.1V
PWMCLK
PWM CLK VIN-OK
+ . R1 R2 Q VREFDK S Q
UVB 10 PWMOUT
-
PFC ILIMIT
.
-1V
+
PFCOFFB 7
5.5V 5V -
SHUTDOWN PFC
. + + PWMCLK GND
10mS PWM CMP
1.5V . . . +
SS
1 GND
SOFT START 6 V+I
PROTECTED BY PATENT
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum ratings are those values beyond which the device could be permanently damaged. Parameter Min. Max. VCC MAX IAC (before start up) IAC (after start up) ISENSE Voltage PFC OUT PWM OUT VEAO PFCOFFB Voltage on Any Other Pin ICC Current (Average) Peak PFC OUT Current, Source or Sink Peak PWM OUT Current, Source or Sink PFC OUT, PWM OUT Energy Per Cycle Junction Temperature Storage Temperature Range Operating Temperature Range Lead Temperature (Soldering, 10 sec) Thermal Resistance (JA) -65 -40 GND-0.3 GND-0.3 -5 GND - 0.3 GND - 0.3 0 GND - 0.3 GND-0.3 20 VCC + 0.3 1.0 0.7 VCC + 0.3 VCC + 0.3 6.3 VCC + 0.3 VCC + 0.3 40 0.5 0.5 1.5 150 150 125 260 80 Units V V V V V V V V V mA A A J /W
2007/11/28 Rev 1.3
Champion Microelectronic Corporation
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CM6805A
10-PIN Green-Mode PFC/PWM Combo CONTROLLER
ELECTRICAL CHARACTERISTICS
TA=Operating Temperature Range (Note 1)
Unless otherwise stated, these specifications apply Vcc=+14V,
Symbol
Parameter
Test Conditions Voltage Error Amplifier (GMv)
CM6805A Min. 0 Typ. Max. 5 65 2.5 -0.5 5.8 6.0 0.1 0.4 -20 90 2.55 -1.0
Unit
Input Voltage Range Transconductance Feedback Reference Voltage Input Bias Current Output High Voltage Output Low Voltage Sink Current Source Current Open Loop Gain Power Supply Rejection Ratio 11V < VCC < 16.5V IAC Input Impedance (CM6805A) ISENSE = 0V, TA=25 PFC OVP Comparator Threshold Voltage Hysteresis PFC ILIMIT Comparator Threshold Voltage Delay to Output VIN OK Comparator Threshold Voltage (CM6805A) Hysteresis PWM Digital Soft Start Digital Soft Start Timer (Note 2) Right After Start Up V + I Comparator Threshold Voltage Delay to Output (Note 2) Threshold Voltage During soft start condition PFC Fault Detect HIGH Time to Fault Detect HIGH Fault Detect LOW VFB=VFAULT DETECT LOW to VFB = OPEN, 470pF from VFB to GND Tri-fault Normal operation without soft start VFB = 3V, VEAO = 6V VFB = 1.5V, VEAO = 1.5V Note 2 VNONINV = VINV, VEAO = 3.75V
V mho V A V V A A dB dB
30 2.44
-35 30 50 50 40 60 60
35K
40K
50K
Ohm
2.64 65
2.77
2.85 150
V mV
-1.05
-1 150
-0.95 300
V ns
2.16 1.13
2.26 1.17
2.36 1.21
V V
10
ms
1.38
1.5 150
1.62 300 200
V ns mV
100
150
2.70
2.77 2
2.85 4 0.6
V ms V
0.4
0.5
2007/11/28 Rev 1.3
Champion Microelectronic Corporation
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CM6805A
10-PIN Green-Mode PFC/PWM Combo CONTROLLER
ELECTRICAL CHARACTERISTICS
TA=Operating Temperature Range (Note 1)
Unless otherwise stated, these specifications apply Vcc=+14V,
Symbol
Parameter
Test Conditions PFCOFFB
CM6805A Min. 4.75 350 Typ. 5.0 500 Max. 5.25 750
Unit
PFCOFFB Threshold Low PFCOFFB Hysteresis
PFCOFFB
V mV
PFC Frequency Voltage Stability Temperature Stability Total Variation PFC Dead Time (Note 2) PFC Minimum Duty Cycle Maximum Duty Cycle Output Low Rdson Output Low Voltage Output High Rdson Output High Voltage Rise/Fall Time (Note 2) IOUT = 100mA, VCC = 15V CL = 1000pF PWM Duty Cycle Range Output Low Rdson Output Low Voltage Output High Rdson (Note 2) Output High Voltage Rise/Fall Time (Note 2) IC At room temp IOUT = -100mA IOUT = -10mA, VCC = 8V At room temp IOUT = 100mA, VCC = 15V CL = 1000pF Supply Start-Up Current Operating Current Under voltage Lockout Threshold Under voltage Lockout Hysteresis VCC = 11V, CL = 0 VCC = 15V, CL = 0 12.35 2.7 135 2 13 3 150 4 13.65 3.3 uA mA V V 13.5 49 49.5 15 0.8 0.7 30 14.2 50 50 22.5 1.5 1.5 45 % ohm V V ohm V ns 13.5 IOUT = -100mA IOUT = -10mA, VCC = 8V IAC=100uA,VFB=2.55V, ISENSE = 0V IAC=0uA,VFB=2.0V, ISENSE = 0V 90 95 15 0.8 0.4 30 14.2 50 22.5 1.5 0.8 45 1 % % ohm V V ohm V ns Line, Temp (CM6805A) 60 0.3 10V < VCC < 15V 1 2 67.5 0.45 74 0.65 % % kHz us
Note 1: Limits are guaranteed by 100% testing, sampling, or correlation with worst-case test conditions. Note 2: Guaranteed by design, not 100% production test.
2007/11/28 Rev 1.3
Champion Microelectronic Corporation
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CM6805A
10-PIN Green-Mode PFC/PWM Combo CONTROLLER
TYPICAL PERFORMANCE CHARACTERISTIC
127 120 Transconductance (umho) 113 106 99 92 85 78 71 64 57 2 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 VFB (V)
Voltage Error Amplifier (GMv) Transconductance
3
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Champion Microelectronic Corporation
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CM6805A
10-PIN Green-Mode PFC/PWM Combo CONTROLLER
Functional Description
The CM6805A consists of an ICST (Input Current Shaping Technique), CCM (Continuous Conduction Mode) or DCM (Discontinuous Conduction Mode) boost PFC (Power Factor Correction) front end and a synchronized PWM (Pulse Width Modulator) back end. The CM6805A is designed to replace FAN4803 (8 pin SOP package), which is the second generation of the ML4803 with 8 pin package. It is distinguished from earlier combo controllers by its low count, innovative input current shaping technique, and very low start-up and operating currents. The PWM section is dedicated to peak current mode operation. It uses conventional trailing-edge modulation, while the PFC uses leading-edge modulation. This patented Leading Edge/Trailing Edge (LETE) modulation technique helps to minimize ripple current in the PFC DC bus capacitor. The main improvements from ML4803 are: 1. Add Green Mode Functions for both PFC and PWM 2. Remove the one pin error amplifier and add back the slew rate enhancement GMv, which is using voltage input instead of current input. This transconductance amplifier will increase the transient response 5 to 10 times from the conventional OP 3. VFB PFC OVP comparator 4. PFC Tri-Fault Detect for UL1950 compliance and enhanced safety 5. A feed forward signal from IAC pin is added to do the automatic slope compensation. This increases the signal to noise ratio during the light load; therefore, THD is improved at light load and high input line voltage. 6. CM6805A does not require the bleed resistor and it uses the more than 800k ohm resistor between IAC pin and rectified line voltage to feed the initial current before the chip wakes up. 7. VIN-OK comparator is added to guaranteed PWM cannot turn on until VFB reaches 2.5V in which PFC boost output is about steady state, typical 380V. 8. A 10mS digital PWM soft start circuit is added 9. 10 pin SOP package 10. No internal Zener and VCCOVP comparator The CM6805A operates both PFC and PWM sections at 67.5kHz. This allows the use of smaller PWM magnetic and output filter components, while minimizing switching losses in the PFC stage. Several protection features have been built into the CM6805A. These include soft-start, redundant PFC over voltage protection, PFC Tri-Fault Detect, VIN-OK, peak current limiting, duty cycle limiting, under-voltage lockout, reference ok comparator PFCOFFB. Detailed Pin Descriptions IAC (Pin 2) Typically, it has a feed-forward resistor, RAC, 4Mega~10Mega ohm resistor connected between this pin and rectified line input voltage. The current of RAC will program the automatic slope compensation for the system. This feed-forward signal can increase the signal to noise ratio for the light load condition or the high input line voltage condition. ISENSE (Pin 3) This pin ties to a resistor which senses the PFC input current. This signal should be negative with respect to the IC ground. It internally feeds the pulse-by-pulse current limit comparator and the current sense feedback signal. The ILIMIT trip level is -1V. The ISENSE feedback is internally multiplied by a gain of four and compared against the internal programmed ramp to set the PFC duty cycle. The intersection of the boost inductor current down-slope with the internal programming ramp determines the boost off-time. It requires a RC filter between ISENSE and PFC boost sensing resistor. VEAO (Pin 4) This is the PFC slew rate enhanced transconductance amplifier output which needs to connected with a compensation network Ground. VFB (Pin 5) Besides this is the PFC slew rate enhanced transconductance input, it also tie to a couple of protection comparators, PFCOVP, and PFC Tri-Fault Detect V + I (Pin 6) This pin is tied to the primary side PWM current sense resistor or transformer. It provides the internal pulse-by-pulse current limit for the PWM stage (which occurs at 1.5V) and the peak current mode feedback path for the current mode control of the PWM stage. Besides current information, the photo-couple also goes into V + I pin. Therefore, it is the SUM Amplifier input. Soft Start is around 10mS after the startup(VCC is greater than 13V).
2007/11/28 Rev 1.3
Champion Microelectronic Corporation
Page 7
CM6805A
10-PIN Green-Mode PFC/PWM Combo CONTROLLER
PFCOFFB (Pin 7) When this pin is below 5V, PFC gate drive, PFCOUT will be turned off until PFCOFFB pin is greater than 5.5V. When PFCOFFB is below 5V, Veao also been pulled low as well. PFCOFFB usually is used for AC Brown Out or Green PWM. For AC Brown out, PFCOFFB can be used to sense the bridge input voltage. For Green PWM, it can be used to sense the photo couple current to detect the PWM load. When the load is light, the photo couple current increased. The photo couple current with a resistor between VCC and PFCOFFB can sense the light load condition. When PFCOFFB is below 5V, PFC can be turned off. VCC (Pin 8) VCC is the power input connection to the IC. The VCC start-up current is 100uA. The no-load ICC current is 2mA. VCC quiescent current will include both the IC biasing currents and the PFC and PWM output currents. Given the operating frequency and the MOSFET gate charge (Qg), average PFC and PWM output currents can be calculated as IOUT = Qg x F. The average magnetizing current required for any gate drive transformers must also be included. The VCC pin is also assumed to be proportional to the PFC output voltage. VCC also ties internally to the UVLO circuitry and VREFOK comparator, enabling the IC at 13V and disabling it at 10V. VCC must be bypassed with a high quality ceramic bypass capacitor placed as close as possible to the IC. Good bypassing is critical to the proper operation of the CM6805A. VCC is typically produced by an additional winding off the boost inductor or PFC Choke, providing a voltage that is proportional to the PFC output voltage. An external clamp, such as shown in Figure 1, is desirable and proposed to limit VCC over voltage to an acceptable value. VCC PFCOUT (Pin 9) and PWM OUT (Pin 10) PFC OUT and PWM OUT are the high-current power driver capable of directly driving the gate of a power MOSFET with peak currents up to -1A and +0.5A. Both outputs are actively held low when VCC is below the UVLO threshold level which is 15V or VREFOK comparator is low. Power Factor Correction Power factor correction makes a nonlinear load look like a resistive load to the AC line. For a resistor, the current drawn from the line is in phase with and proportional to the line voltage, so the power factor is unity (one). A common class of nonlinear load is the input of most power supplies, which use a bridge rectifier and capacitive input filter fed from the line. The peak-charging effect, which occurs on the input filter capacitor in these supplies, causes brief high-amplitude pulses of current to flow from the power line, rather than a sinusoidal current in phase with the line voltage. Such supplies present a power factor to the line of less than one (i.e. they cause significant current harmonics of the power line frequency to appear at their input). If the input current drawn by such a supply (or any other nonlinear load) can be made to follow the input voltage in instantaneous amplitude, it will appear resistive to the AC line and a unity power factor will be achieved. To hold the input current draw of a device drawing power from the AC line in phase with and proportional to the input voltage, a way must be found to prevent that device from loading the line except in proportion to the instantaneous line voltage. The PFC section of the CM6805A uses a boost-mode DC-DC converter to accomplish this. The input to the converter is the full wave rectified AC line voltage. No bulk filtering is applied following the bridge rectifier, so the input voltage to the boost converter ranges (at twice line frequency) from zero volts to the peak value of the AC input and back to zero. By forcing the boost converter to meet two simultaneous conditions, it is possible to ensure that the current draws from the power line matches the instantaneous line voltage. One of these conditions is that the output voltage of the boost converter must be set higher than the peak value of the line voltage. A commonly used value is 385VFB, to allow for a high line of 270VACrms. The other condition is that the current that the converter is allowed to draw from the line at any given instant must be proportional to the line voltage.
1N 5248
GND Figure1 . Optional VCC Clamp
This limits the maximum VCC that can be applied about 18V to avoid OVP which allowing to the VCC maximum rating. An RC filter at VCC is required between boost trap winding and VCC.
2007/11/28 Rev 1.3
Champion Microelectronic Corporation
Page 8
CM6805A
10-PIN Green-Mode PFC/PWM Combo CONTROLLER
PFC Control: Leading Edge Modulation with Input Current Shaping Technique (I.C.S.T.) The only differences between the conventional PFC control topology and I.C.S.T. is: the current loop of the conventional control method is a close loop method and it requires a detail understanding about the system loop gain to design. With I.C.S.T., since the current loop is an open loop, it is very straightforward to implement it. The end result of the any PFC system, the power supply is like a pure resistor at low frequency. Therefore, current is in phase with voltage. In the conventional control, it forces the input current to follow the input voltage. In CM6805A, the chip thinks if a boost converter needs to behave like a low frequency resistor, what the duty cycle should be. The following equations is CM6805A try to achieve: Therefore, equation (6) becomes:
Id =
I d x toff
Tsw
= I d x d ' = I d x (1 - d )
(7)
Combine equation (7) and equation (5), and we get:
Id x d ' = Id = Id =
'
( d ' ) 2 x Vout
Re
(8)
d x Vout
Re
Vout toff x Re Tsw
From this simple equation (8), we implement the PFC control section of the CM6805A Leading/Trailing Modulation Conventional Pulse Width Modulation (PWM) techniques employ trailing edge modulation in which the switch will turn ON right after the trailing edge of the system clock. The error amplifier output is then compared with the modulating ramp. When the modulating ramp reaches the level of the error amplifier output voltage, the switch will be turned OFF. When the switch is ON, the inductor current will ramp up. The effective duty cycle of the trailing edge modulation is determined during the ON time of the switch. Figure 2 shows a typical trailing edge control scheme. In case of leading edge modulation, the switch is turned OFF right at the leading edge of the system clock. When the modulating ramp reaches the level of the error amplifier output voltage, the switch will be turned ON. The effective duty-cycle of the leading edge modulation is determined during OFF time of the switch. Figure 3 shows a leading edge control scheme.
Re =
Vin
I in
(1)
I l = I in
(2)
Equation 2 means: average boost inductor current equals to input current.
Vin x I l Vout x I d
(3)
Therefore, input instantaneous power is about to equal to the output instantaneous power. For steady state and for the each phase angle, boost converter DC equation at continuous conduction mode is:
Vout
Vin
=1
(1 - d )
(4)
Rearrange above equations, (1), (2),(3), and (4) in term of Vout and d, boost converter duty cycle and we can get average boost diode current equation (5):
Id =
(1 - d ) 2 x Vout
Re
(5)
Also, the average diode current can be expressed as:
Id =
1 Tsw
Toff
0
I d (t ) dt
(6)
If the value of the boost inductor is large enough, we can assume
I d (t ) ~ I d .
It means during each cycle or we
can say during the sampling, the diode current is a constant.
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Champion Microelectronic Corporation
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CM6805A
10-PIN Green-Mode PFC/PWM Combo CONTROLLER
One of the advantages of this control technique is that it required only one system clock. Switch 1(SW1) turns OFF and switch 2 (SW2) turns ON at the same instant to minimize the momentary "no-load" period, thus lowering ripple voltage generated by the switching action. With such synchronized switching, the ripple voltage of the first stage is reduced. Calculation and evaluation have shown that the 120Hz component of the PFC's output ripple voltage can be reduced by as much as 30% using this method, substantially reducing dissipation in the high-voltage PFC capacitor. ZCV: Compensation Net Work for the Voltage Loop GMv: Transconductance of VEAO PIN: Average PFC Input Power VOUTDC: PFC Boost Output Voltage; typical designed value is 380V. CDC: PFC Boost Output Capacitor VEAO: This is the necessary change of the VEAO to deliver the designed average input power. The average value is 6V-3V=3V since when the input line voltage increases, the delta VEAO will be reduced to deliver the same to the output. To over compensate, we choose the delta VEAO is 3V. Internal Voltage Ramp The internal ramp current source is programmed by way of VEAO pin voltage. When VEAO increases the ramp current source is also increase. This current source is used to develop the internal ramp by charging the internal 30pF +12/ -10% capacitor. The frequency of the internal programming ramp is set internally to 67.5kHz. Design PFC ISENSE Filtering ISENSE Filter, the RC filter between Rs and ISENSE: There are 2 purposes to add a filter at ISENSE pin: 1.) Protection: During start up or inrush current conditions, it will have a large voltage cross Rs, which is the sensing resistor of the PFC boost converter. It requires the ISENSE Filter to attenuate the energy. 2.) Reduce L, the Boost Inductor: The ISENSE Filter also can reduce the Boost Inductor value since the ISENSE Filter behaves like an integrator before going ISENSE which is the input of the current error amplifier, IEAO.
Typical Applications
PFC Section: PFC Voltage Loop Error Amp, VEAO The ML4803 utilizes an one pin voltage error amplifier in the PFC section (VEAO). In the CM6805A, it is using the slew rate enhanced transconductance amplifier, which is the same as error amplifier in the CM6800. The unique transconductance profile can speed up the conventional transient response by 10 times. The internal reference of the VEAO is 2.5V. The input of the VEAO is VFB pin. PFC Voltage Loop Compensation The voltage-loop bandwidth must be set to less than 120Hz to limit the amount of line current harmonic distortion. A typical crossover frequency is 30Hz. The Voltage Loop Gain (S)
VOUT VFB VEAO * * VEAO VOUT VFB PIN * 2.5V * GMV * ZCV 2 VOUTDC * VEAO * S * CDC =
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Champion Microelectronic Corporation
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CM6805A
10-PIN Green-Mode PFC/PWM Combo CONTROLLER
The ISENSE Filter is a RC filter. The resistor value of the ISENSE Filter is between 100 ohm and 50 ohm. By selecting RFILTER equal to 50 ohm will keep the offset of the IEAO less than 5mV. Usually, we design the pole of ISENSE Filter at fpfc/6, one sixth of the PFC switching frequency. Therefore, the boost inductor can be reduced 6 times without disturbing the stability. Therefore, the capacitor of the ISENSE Filter, CFILTER, will be around 283nF. IAC, RAC, Automatic Slope Compensation, DCM at high line and light load, and Startup current There are 4 purposes for IAC pin: 1.) For the leading edge modulation, when the duty cycle is less than 50%, it requires the similar slope compensation, as the duty cycle of the trailing edge modulation is greater than 50%. In the CM6805A, it is a relatively easy thing to design. Use an more than 800K ohm resistor, RAC to connect IAC pin and the rectified line voltage. It will do the automatic slope compensation. If the input boost inductor is too small, the RAC may need to be reduced more. 2.) During the startup period, Rac also provides the initial startup current, 100uA;therefore, the bleed resistor is not needed. 3.) Since IAC pin with RAC behaves as a feedforward signal, it also enhances the signal to noise ratio and the THD of the input current. 4.) It also will try to keep the maximum input power to be constant. However, the maximum input power will still go up when the input line voltage goes up. Start Up of the system, UVLO, VREFOK and Soft Start During the Start-up period, RAC resistor will provide the start up current~100uA from the rectified line voltage to IAC pin. During the Start up, the soft start function is triggered and the duration of the soft start will last around 10mS. PFC section wakes up after Start up period After Start up period, PFC section will softly start since VEAO is zero before the start-up period. Since VEAO is a slew rate enhanced transconductance amplifier (see figure 3), VEAO has a high impedance output like a current source and it will slowly charge the compensation net work which needs to be designed by using the voltage loop gain equation. Before PFC boost output reaches its design voltage, it is around 380V and VFB reaches 2.5V, PWM section is off. PWM section wakes up after PFC reaches steady state PWM section is off all the time before PFC VFB reaches 2.25V. Then internal 10mS digital PWM soft start circuit slowly ramps up the soft-start voltage. PFC OVP Comparator PFC OVP Comparator sense VFB pin which is the same the voltage loop input. The good thing is the compensation network is connected to VEAO. The PFC OVP function is a relative fast OVP. It is not like the conventional error amplifier which is an operational amplifier and it requires a local feedback and it make the OVP action becomes very slow. The threshold of the PFC OVP is 2.5V+10% =2.75V with 250mV hysteresis. PFC Tri-Fault Detect Comparator To improve power supply reliability, reduce system component count, and simplify compliance to UL1950 safety standards, the CM6805A includes PFC Tri-Fault Detect. This feature monitors VFB (Pin 5) for certain PFC fault conditions. In case of a feedback path failure, the output of the PFC could go out of safe operating limits. With such a failure, VFB will go outside of its normal operating area. Should VFB go too low, too high, or open, PFC Tri-Fault Detect senses the error and terminates the PFC output drive. PFC Tri-Fault detect is an entirely internal circuit. It requires no external components to serve its protective function. VCC over voltage and generate VCC For the CM6805A system, if VCC is generated from a source that is proportional to the PFC output voltage. The PFC OVP will avoid the VCC over voltage. Given that 16V on VCC corresponds to 380V on the PFC output, 17.6V on VCC corresponds to an acceptable level of 18V. Typically, there is a bootstrap winding off the boost inductor. The VCC isn't built in the VCC OVP function. For the VCC maximum rating, an external zener clamp is desirable and proposed to limit VCC over voltage. It is a necessary to put RC filter between bootstrap winding and VCC. For VCC=15V, it is sufficient to drive either a power MOSFET or a IGBT.
2007/11/28 Rev 1.3
Champion Microelectronic Corporation
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CM6805A
10-PIN Green-Mode PFC/PWM Combo CONTROLLER
UVLO The UVLO threshold is 13V providing 3V hysteresis. PFCOUT and PWMOUT Both PFCOUT and PWMOUT are CMOS drivers. They both have adaptive anti-shoot through to reduce the switching loss. Its pull-up is a 30ohm PMOS driver and its pull-down is a 15ohm NMOS driver. It can source 0.5A and sink 1A if the VCC is above 15V. PWM Section After 10mS digital soft start, CM6805A's PWM is operating as a typical current mode. It requires a secondary feedback, typically, it is configured with CM431, and photo couple. Since PWM Section is different from CM6800 family, it needs the emitter of the photo couple to connected with V+ I instead of the collector. The PWM current information also goes into V+I. Usually, the PWM current information requires a RC filter before goes into the V + I. Therefore, V+I actually is a summing node from voltage information which is from photo couple and CM431 and current information which is from one end of PWM sensing resistor and the signal goes through a single pole, RC filter then enter the V+I pin. This RC filter at V+I also serves several functions: 1.) It protects IC. 2.) It provides level shift for voltage information. 3.) It filters the switching noise from current information.
At normal operation, the threshold voltage of the V + I pin is 1.5V. When the V + I is greater than 1.5V, PWM output driver will turn off the PWM Power MOSFET. When the Soft Start is triggered, the V+I threshold is around 150mV. Soft Start Can be triggered by the following conditions: 1.) During the startup (VCC is less than 10V) 2.) Vfb is below ~ 1.1V During above 2 conditions, the V + I threshold is around 150mV until the conditions have been removed. After above 2 conditions have been removed, the internal Soft Start D to A will ramp up the voltage from ~150mV to 2V. Each Soft Start Ramp can last around 10mS. Component Reduction Components associated with the VRMS and IEAO pins of a typical PFC controller such as the CM6800 have been eliminated. The PFC power limit and bandwidth does vary with line voltage.
2007/11/28 Rev 1.3
Champion Microelectronic Corporation
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CM6805A
10-PIN Green-Mode PFC/PWM Combo CONTROLLER
Application Circuit (PC Power)
EMI
GBU808
L FG N
IN5406 0.08 2W(s) IN5406 0.47uF/400V
GND
1M 380VDC VCC 4.7uF
+
1N4148 10K 1N4148
380VDC
B+
20A/100V +12V 09N90 10 2200uF/16V 1000PF VCC 30A/60V
3 1 + +
2200uF/10V
2200uF/6.3V 4.75K 1% 1/8W
09N90 10 PWM IS 0.2 2W GND
CM6805AG Marking Rule
2007/11/28 Rev 1.3
Champion Microelectronic Corporation
Page 13
2
PWM OUT
+
-
AC INLET
1N5406 5M VCC T106-75 15V 280K
1
380VDC ER806 VCC
CM6805A
GND PWM OUT
SR160
10
SR160 PWM OUT 10 1/2W SR140 1K VCC 1N4148 10K VCC 68K 470pF/250V 10K 1M 14N50
+
47
102pF
2 IAC PFC OUT 9
180uF/450V
SR140
3 Isense VCC 8
4
VEAO
PFCOFFB
7
1M
5
VFB
V+I
6
9.5V
104pF
10M ISO1A
330K 104pF 474pF 473pF 0 472pF 13K 500 470pF PWM IS
+5V
+12V
10
1000PF
10.2K 1%
ISO1A 817C 1K
4.7K 2200uF/16V
0.1uF
GND +5V
39.2K 1%
2200PF
TL431
1000PF
+
+
CM6805A
10-PIN Green-Mode PFC/PWM Combo CONTROLLER
PACKAGE DIMENSION
10 Pin-SSOP (R10)
PIN 1 ID
ZD
B
F
NUMBERING SCHEME
Ordering Number: CM6805AGXY (note1)
note1: X : Suffix for Temperature Range (note 3) Y : Suffix for Package Type (note 4) note2: G : Suffix for Pb Free Product note 3: X= I : -40~+125 note 4: Y= R: SSOP-10
2007/11/28 Rev 1.3
Champion Microelectronic Corporation
Page 14
CM6805A
10-PIN Green-Mode PFC/PWM Combo CONTROLLER
IMPORTANT NOTICE
Champion Microelectronic Corporation (CMC) reserves the right to make changes to its products or to discontinue any integrated circuit product or service without notice, and advises its customers to obtain the latest version of relevant information to verify, before placing orders, that the information being relied on is current. A few applications using integrated circuit products may involve potential risks of death, personal injury, or severe property or environmental damage. CMC integrated circuit products are not designed, intended, authorized, or warranted to be suitable for use in life-support applications, devices or systems or other critical applications. Use of CMC products in such applications is understood to be fully at the risk of the customer. In order to minimize risks associated with the customer's applications, the customer should provide adequate design and operating safeguards.
HsinChu Headquarter 5F, No. 11, Park Avenue II, Science-Based Industrial Park, HsinChu City, Taiwan T E L : +886-3-567 9979 F A X : +886-3-567 9909 http://www.champion-micro.com
Sales & Marketing
7F-6, No.32, Sec. 1, Chenggong Rd., Nangang District, Taipei City 115, Taiwan R.O.C.
T E L : +886-2-2788 0558 F A X : +886-2-2788 2985
2007/11/28 Rev 1.3
Champion Microelectronic Corporation
Page 15

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